Circuit board with buried circuit pattern

ABSTRACT

A circuit board includes: an insulator having a groove; a circuit layer filling a portion of the groove; a solder pad on the circuit layer filling the remainder of the groove; and a circuit pattern electrically connected with the circuit layer, the circuit pattern buried in the insulator such that a portion of the circuit pattern is exposed at a surface of the insulator.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application is a U.S. divisional application filed under 37 CFR1.53(b) claiming priority benefit of U.S. Ser. No. 11/976,070 filed inthe United States on Oct. 19, 2007, which claims earlier prioritybenefit to Korean Patent Application No. 10-2006-0105923 filed with theKorean Intellectual Property Office on Oct. 30, 2006, the disclosures ofwhich are incorporated herein by reference.

BACKGROUND

1. Field

The present invention relates to a circuit board and a method ofmanufacturing the circuit board.

2. Description of the Related Art

With recent advances in the electronics industry, there is a growingdemand for electronic components that provide higher performance, morefunctionality, and smaller sizes. In this context, there is also ademand for higher integration, lower thickness and finer circuitpatterns on the board for surface-mounted components, such as in an SiP(system in package) or 3D package, etc. In particular, in surfacemounting technology for mounting electronic components on a board, flipchip bonding is gradually replacing wire bonding as the preferred methodfor electrically connecting an electronic component with the board.

In flip chip bonding according to the related art, solder bumps arepositioned between the flip chips and the board for electricalconnection, where a coining operation may be performed on the solderbumps to ensure the reliability of electrical contact between the flipchips and the board. This coining operation, however, is a processperformed for each unit, and thus entails a long lead time.

Also, when another solder bump is formed on the bump pad of the boardonto which the solder bump of the flip chip is placed in order to ensurethe reliability of electrical connection between the flip chip and theboard, the overall thickness of the package may be increased aftermounting the flip chip.

In addition, the circuit pattern formed on the board according to therelated art may be exposed at the upper portion of the board, so thatthe overall height may be increased, and undercuts may occur at theattachment portions of the circuit pattern and board, so that thecircuit may be peeled off from the board.

SUMMARY

An aspect of the invention is to invention is to provide a circuitboard, and a method of manufacturing a circuit board, in which thecircuit patterns and bump pads including solder pads are formedbeforehand on a carrier and copied onto an insulator, to allow the bumppads and circuit patterns to be buried in the board and providehigh-density circuit patterns and flat bump pads.

One aspect of the invention provides a circuit board, which includes aninsulator that includes a groove, a circuit layer which fills a portionof the groove, a solder pad on the circuit layer which fills theremainder of the groove, and a circuit pattern which is electricallyconnected with the circuit layer and which is buried in the insulatorsuch that a portion of the circuit pattern is exposed at a surface ofthe insulator.

The circuit pattern may be buried in either surface of the insulator.

A metal film may additionally be included between the circuit layer andthe solder pad.

The circuit layer may be formed at a bottom of the groove and at a sidewall of the groove extending from the bottom, and the metal film may bemade to cover the circuit layer.

The solder pad may contain at least one of lead (Pb), gold (Au), andsilver (Ag), while the metal film may contain at least one of gold (Au)and nickel (Ni).

Another aspect of the invention provides a method of manufacturing acircuit board that includes a bump pad on which a solder bump may beplaced. The method may include forming a solder pad on a surface of afirst carrier; forming a metal film, which covers the solder pad andwhich extends to a bump pad forming region; forming a circuit layer anda circuit pattern, which are electrically connected with the metal film,on a surface of the first carrier; pressing the first carrier and aninsulator such that a surface of the first carrier and the insulatorfaces each other; and removing the first carrier.

An operation of leveling the insulator may additionally be included,after removing the first carrier.

Forming the solder pad may include selectively forming photoresist on asurface of the first carrier to form an intaglio pattern correspondingwith the solder pad, filling solder paste in the intaglio pattern,reflowing the solder paste, and removing the photoresist.

Forming the metal film may include selectively forming photoresist onthe first carrier to form an intaglio pattern corresponding with thebump pad forming region, forming a metal film in the intaglio pattern,and removing the photoresist.

Forming the circuit layer and the circuit pattern may includeselectively forming photoresist on a surface of the first carrier toform an intaglio pattern corresponding with the circuit pattern and thebump pad forming region, filling solder paste in the intaglio pattern,and removing the photoresist.

Filling the solder paste in the intaglio pattern may be performed byelectroplating.

Forming the solder pad may include forming a board pad on a surface of asecond carrier, forming the circuit layer and the circuit pattern mayinclude forming a circuit pattern electrically connected with the boardpad on a surface of the second carrier, pressing the first carrier andthe insulator may include pressing the first carrier and the secondcarrier onto either surface of the insulator such that a surface of thefirst carrier and a surface of the second carrier respectively face theinsulator, and removing the first carrier may include removing the firstcarrier and the second carrier.

After removing the first carrier and the second carrier, additionaloperations of leveling either surface of the insulator, forming vias inthe insulator, and coating solder resist on the surfaces of theinsulator, may be included.

Additional aspects and advantages of the invention will be set forth inpart in the description which follows, and in part will be obvious fromthe description, or may be learned by practice of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a cross-sectional view illustrating a circuit board having amounted chip, according to an embodiment of the invention.

FIG. 2, FIG. 3, FIG. 4, FIG. 5 , FIG. 6, FIG. 7, FIG. 8, FIG. 9 and FIG.10 represent a flow diagram illustrating a process of forming bump padsand a circuit pattern according to an embodiment of the invention.

FIG. 11, FIG. 12, FIG. 13, FIG. 14 and FIG. 15 represent a flow diagramillustrating a process of manufacturing a circuit board according to anembodiment of the invention.

FIG. 16 is a flowchart illustrating a method of manufacturing a circuitboard according to an embodiment of the invention.

DESCRIPTION OF EMBODIMENTS

The circuit board and manufacturing method thereof, according to certainembodiments of the invention, will be described below in more detailwith reference to the accompanying drawings, in which those componentsare rendered the same reference numeral that are the same or are incorrespondence, regardless of the figure number, and redundantexplanations are omitted.

FIG. 1 is a cross-sectional view illustrating a circuit board having amounted chip, according to an embodiment of the invention. In FIG. 1 areillustrated a chip 12, solder bumps 14, an insulator 16, underfill 18,bump pads 23, board pads 30, solder pads 20, metal film 22, a circuitlayer 24, a circuit pattern 26, solder balls 32, vias 28, and solderresist 34.

With the trend of electronic products towards providing higherintegration, higher performance, and smaller sizes, the preferred methodof connection between a semiconductor chip and a circuit board isshifting from wire bonding to flip chip bonding.

Flip chip bonding involves electrically connecting a chip 12 with thecircuit board using solder bumps 14, instead of metal wires. Afterapplying underfill 18 to protect the solder bumps 14 from mechanicaldamage and the external environment, solder balls 32 may be attachedonto the surface of the circuit board opposite the surface where thechip 12 is attached, for electrical connection with an external circuitboard. This flip chip bonding allows a short electrical distance betweenthe chip 12 and the circuit board to provide higher electrical speeds,and also makes it possible, in accordance with higher levels ofintegration, to arrange the solder bumps 14 in arrays to respond to thechip 12 having multiple pins.

The solder bumps 14 may be coupled to the metal pad (not shown) of thechip 12, while the solder bumps 14 coupled to the chip 12 may be coupledto bump pads 23 formed on the circuit board for electrical connection.

The connection between the solder bumps 14 and the bump pads 23 mayinclude mounting the solder bumps 14 after aligning the solder bumps 14with the bump pads 23, and then placing these in an oven for reflowing,so that the connection between the chip 12 and the circuit board may beimplemented by the solder.

Whereas in the related art, metal pads made of nickel/gold plating wereused as the bump pads 23, to connect the chip 12 and the circuit boardby placing the solder bumps 14 on the metal pads, in this embodiment,bump pads 23 composed of solder pads 20 and metal film 22 are used toensure the reliability of electrical contact. That is, the solder pads20 are used that are made of the same material as for the solder bumps14, so that the solder bumps 14 and solder pads 20 may be coupled betterwhen the solder is fused during the reflow process. When the chip 12 andcircuit board are coupled due to the coupling of the bump pads 23 andsolder bumps 14, an underfill 18 may be applied to fill the spacebetween the chip 12 and the circuit board and thus protect the solder,using an underfill material including epoxy, etc.

Next, solder balls 32 for electrically connecting with an externalcircuit board, etc., may be attached to surface of the circuit boardopposite the surface where the chip 12 is mounted, to complete asemiconductor package. The solder balls 32 may be coupled to the boardpads 30 formed on the circuit board, to form a plane arrangement forcoupling with an external circuit board, thereby allowing higher levelsof integration and greater numbers of pins.

A circuit board according to this embodiment may be composed of aninsulator which includes grooves, a circuit layer 24 which fills aportion of the grooves, solder pads 20 on the circuit layer 24 whichfill the remainder of the grooves, and a circuit pattern 26 which iselectrically connected with the circuit layer and which is buried in theinsulator 16 such that a portion is exposed at the surface of theinsulator 16. The circuit pattern 26 may be buried each on both surfacesof the insulator 16.

To improve adhesion between the circuit layer 24 and the solder pads 20,a metal film 22 may be included between the circuit layer 24 and solderpads 20. A bump pad 23 may be composed of the solder pad 20 and metalfilm 22, and may be connected with the circuit pattern 26 by way of thecircuit layer 24, when a solder bump 14 is mounted.

In particular, the circuit layer 24 may be formed at the bottom of agroove formed in the insulator 16 and may extend from the bottom to beformed on portions of the side walls of the groove. Here, the metal film22 may be made to cover the circuit layer 24. That is, while it ispossible to have the circuit layer 24 fill a portion of the grooveformed in the insulator 16, stack a metal layer on, and have the solderpads 20 on the metal layer, instead, the circuit layer 24 may be formedon the bottom of the groove and on the side walls of the grooveextending from the bottom, to thus form another smaller groove, with themetal film 22 covering the circuit layer 24 and solder filling theremainder of the groove, thereby forming a solder pad 20. Here, aportion of the metal film 22 and the solder pad 20 may be exposed at theinsulator 16, where the exposed portion of the metal film 22 and thesolder pad 20 form a bump pad 23, on which a solder bump 14 may bemounted.

The circuit layer 24 may be a part of the circuit pattern 26 of theinsulator 16, and may be connected with the circuit pattern 26 to forman electrical connection with the chip 12 and the circuit pattern 26 ofthe insulator 16.

The solder pads 20 may be made of the same material as that of thesolder bumps 14, and may include at least one of lead (Pb), gold (Au),and silver (Ag).

Also, the metal film 22 may be to protect the solder pads 20 and improveadhesion with the circuit layer 24, and may be made by plating gold (Au)or nickel (Ni), where it is also possible to form the metal film 22 byplating with nickel (Ni) and then plating again with gold (Au). Ofcourse, it is also possible to place the solder pads 20 directly on thecircuit layer 24 without using a metal film 22.

The circuit pattern 26 in a circuit board according to this embodimentmay be buried in the insulator 16 such that a portion is exposed at thesurface of the board. If the circuit pattern 26 is buried in theinsulator 16, there may be greater adhesion between the circuit and theinsulator 16 so that there may be less peeling, and the overallthickness of the circuit board may be reduced. In addition, as thecircuit is buried inside the insulator 16, there may be greater evennessand easier heat release. Moreover, there may be less likelihood ofbending occurring of the circuit board, and higher reliability withrespect to ion migration between adjacent circuits.

FIG. 2, FIG. 3, FIG. 4, FIG. 5 , FIG. 6, FIG. 7, FIG. 8, FIG. 9 and FIG.10 represent a flow diagram illustrating a process of forming bump padsand a circuit pattern according to an embodiment of the invention. InFIG. 2 to FIG. 10 are illustrated solder paste 40, photosensitivematerial 35, photoresist 36, a seed layer 38, a first carrier 42, metalfilm 22, a circuit layer 24, solder pads 20, and a circuit pattern 26.

The method of forming the bump pads 23 and the circuit pattern 26 on thefirst carrier may include the operations of forming solder pads 20 on asurface of the first carrier 42, forming a metal film 22 that covers thesolder pads 20 and extends to a region corresponding to the bump pads23, and forming a circuit pattern 26 on a surface of the carrier that iselectrically connected with the metal film 22.

Forming the solder pads 20 on a surface of the first carrier 42 mayinclude, with reference to drawings FIG. 2 and FIG. 3, selectivelyforming photoresist 36 on a surface of the first carrier 42 to form anintaglio pattern that is in correspondence with the solder pads 20,filling the intaglio pattern with solder paste 40, reflowing the solderpaste 40, and then removing the photoresist 36, to form the solder pads20.

The method of selectively forming photoresist 36 on a surface of thefirst carrier 42 to form an intaglio pattern may include first applyingphotosensitive material 35 on a surface of the first carrier 42 usingexisting equipment, fabricating a photomask in correspondence with thesolder pad 20 region within the multiple bump pads 23 on which thesolder bumps 14 are to be mounted, and afterwards stacking the photomaskon the surface of the first carrier 42 coated with photosensitivematerial 35 and then exposing to ultraviolet rays. After the exposure,when the non-cured portions of the photosensitive material 35 aredeveloped with developing liquid, an intaglio pattern may be formed thatis in correspondence with the solder pad 20 forming region on thesurface of the first carrier 42. The cured photosensitive material 35that is not removed by the developing liquid may become the photoresist36.

When the intaglio pattern is formed on the first carrier 42, it may befilled in with solder paste 40. For the method of filling solder paste40 in the intaglio pattern, any method apparent to those skilled in theart may be used, such as filling in solder paste 40 using a blade, andfilling in solder paste 40 ink using inkjet printing, etc. The solderpaste 40 filled in the intaglio pattern may be made of the same materialas that of the solder bumps 14, and may include at least one of lead(Pb), gold (Au), and silver (Ag).

When the solder paste 40 is filled in, a reflow process may be performedfor curing the solder paste 40. Here, the solder paste 40 may have around form at the upper surface, due to surface tension. When thephotoresist 36 is removed after the reflow process, the solder pads 20may be completed on the surface of the first carrier, as illustrated inFIG. 4.

The method of forming the metal film 22 that covers the solder pads 20and extends to a region corresponding to the bump pads 23 may include,as illustrated in FIG. 5, FIG. 6 and FIG. 7, selectively formingphotoresist 36 on the first carrier 42, on which solder pads 20 areformed, to form an intaglio pattern that is in correspondence with thebump pad 23 forming region, forming the metal film 22 in the intagliopattern, and then removing the photoresist 36.

In this embodiment, the bump pads 23 include the solder pads 20 andmetal film 22, where the forming region of the bump pads 23 is greaterthan the solder pad 20 forming region. Thus, the metal film 22 may beformed such that covers the solder pads 20, between the solder pad 20forming region and the bump pad 23 forming region. To this end, anintaglio pattern may be formed, which is greater than the intagliopattern for forming the solder pads 20, on the surface of the firstcarrier 42 where the solder pads 20 are formed. That is, as illustratedin FIG. 5, the photoresist 36 may be formed on the surface of the firstcarrier 42 to form an intaglio pattern corresponding to the bump pad 23forming region. When the intaglio pattern is formed, the metal film 22may be formed for protecting the solder pads 20 as well as for improvingadhesion with the circuit pattern 26 that is to be formed later.

A method apparent to those skilled in the art may be used for formingthe metal film 22, such as plating by electroless plating and/orelectroplating, filling with metal paste, applying metallic ink byinkjet printing, and sputtering, etc. A film made of gold (Au) or nickel(Ni) may be formed for the metal film 22, while it is also possible tofirst form the nickel and then form the gold again thereon.

In this particular embodiment, gold (Au) plating was performed to formthe metal film 22. To perform the gold (Au) plating, a process offorming a seed layer 38 on the surface of the first carrier 42 may existbefore forming the solder pads 20, and gold (Au) electroplating may beperformed using this seed layer 38 as an electrode.

By forming the metal film 22 after forming the intaglio patterncorresponding to the bump pad 23 forming region that is greater than theintaglio pattern corresponding to the solder pad 20 forming region, themetal film 22 may be formed which covers the already formed solder pads20 and which exists between the solder pad 20 forming region and thebump pad 23 forming region. Afterwards, the photoresist 36 used forforming the intaglio pattern corresponding to the bump pad 23 formingregion may be removed.

In the case that the bump pad 23 forming region is equal to the solderpad 20 forming region, the photoresist 36 for forming the intagliopattern corresponding with the solder pads 20 need not be removed, butmay instead be used, in forming the metal film 22 to just cover thesolder pads 20. Furthermore, in the process of forming the circuitpattern 26, which will be described later, if the photoresist 36 forforming the intaglio pattern corresponding to the solder pads 20 are notremoved but used again, it is also possible to manufacture a circuitboard having a structure of the solder pads 20, metal film 22, andcircuit pattern 26 stacked in order.

When the solder pads 20 and metal film 22 are formed, a circuit pattern26 electrically connected with the metal film 22 may be formed, asillustrated in FIG. 8, FIG. 9 and FIG. 10. The method of forming thecircuit pattern 26 may include selectively forming photoresist 36 on thesurface of the first carrier 42 where the solder pads 20 and metal film22 are formed to form an intaglio pattern corresponding to the circuitpattern 26 and bump pad 23 forming region, filling the intaglio patternwith conductive material, and then removing the photoresist 36.

The circuit layer 24 described above may be included in the circuitpattern 26. In other words, the circuit layer 24 may be a part of thecircuit pattern 26 formed at one side of the bump pads 23, where thecircuit pattern 26 may enable electrical connection between the chip 12,circuit board, and an external circuit board. Thus, by selectivelyforming photoresist 36 on the surface of the first carrier 42 to form anintaglio pattern corresponding to the circuit pattern 26 and bump pad 23forming region, the circuit layer 24 and circuit pattern 26 may beformed at the same time.

When the intaglio pattern corresponding to the circuit pattern 26 andbump pad 23 forming region is formed, a conductive material may befilled in the intaglio pattern. A method apparent to those skilled inthe art may be used for filling in the conductive material, such asplating by electroless plating and/or electroplating, filling withconductive paste, filling with conductive ink by inkjet printing, andfilling by polymerizing a conductive polymer, etc. For the conductivematerial filled in the intaglio pattern, a conductive material known tothose skilled in the art may be used, such as aluminum (Al), silver(Ag), copper (Cu), and chromium (Cr), etc.

In this embodiment, the first carrier 42 having a seed layer 38 formedthereon is used, in performing copper (Cu) electroplating, with the seedlayer 38 as the electrode, to fill the conductive material of copper(Cu) in the intaglio pattern. If the first carrier 42 is made of aninsulating resin, etc., it is also possible to fill the intaglio patternwith conductive material by first performing electroless plating to forma seed layer 38 and then using this as the electrode to performelectroplating. Later, when the conductive material is filled in, thephotoresist 36 may be removed.

By way of the procedures described above, a first carrier 42 may bemanufactured that has bump pads 23 and a circuit pattern 26 formed onits surface in relievo.

FIG. 11, FIG. 12, FIG. 13, FIG. 14 and FIG. 15 represent a flow diagramillustrating a process of manufacturing a circuit board according to anembodiment of the invention. In FIG. 11 to FIG. 15 are illustratedsolder pads 20, metal film 22, a circuit layer 24, board pads 30, seedlayers 38, circuit patterns 26, a first carrier 42, an insulator 16, asecond carrier 44, vias 28, and solder resist 34.

This embodiment illustrates a process of forming the bump pads 23 andcircuit pattern 26 on one surface of the insulator 16 and forming theboard pads 30 and circuit pattern 26 on the other surface of theinsulator 16 with a single pressing. Of course, it is possible totranscribe the bump pads 23 and circuit pattern on one surface of theinsulator 16 and afterwards transcribe the board pads 30 and circuitpattern 26 on the other surface in order.

Moreover, it is also possible to transcribe the bump pads 23 and circuitpattern 26 on just one surface of the insulator 16. In this case, apressing carrier (not shown) may be placed at the other surface of theinsulator 16 to apply an equal amount of pressure.

First, as illustrated in FIG. 11 and FIG. 12, the first carrier 42 maybe prepared which has the bump pads 23 and circuit pattern 26 formed onone surface in relievo, according to a method described above.

Next, the board pads 30 may be formed, by selectively formingphotoresist on a surface of the second carrier 44 to form an intagliopattern corresponding to a board pad 30 forming region, filling theintaglio pattern with a conductive material including at least one ofnickel (Ni), gold (Au), aluminum (Al), and copper (Cu), and removing thephotoresist. When the board pads 30 are formed, photoresist may beselectively formed on the surface of the second carrier 44 that is incorrespondence with the circuit pattern 26 to be formed on the othersurface of the insulator 16, the intaglio pattern may be filled in withconductive material, and then the photoresist may be removed, to preparethe second carrier 44 that has the board pads 30 and circuit pattern 26formed on its surface in relievo.

Next, the surface of the first carrier 42 on which the bump pads 23 andcircuit pattern 26 are formed, and the surface of the second carrier 44on which the board pads 30 and circuit pattern 26 are formed, may bemade to face either surface of the insulator 16. After the first carrier42, insulator 16, and second carrier 44 are pressed together, the firstcarrier 42 and second carrier 44 may be removed, to result in the bumppads 23, board pads 30, and circuit patterns 26 buried and transcribedinto the insulator 16.

If a carrier is used on which a seed layer 38 is formed, as illustratedin FIG. 13, a leveling operation may be performed, such as by etchingone or both surfaces of the insulator 16 or by chemical mechanicalpolishing (CMP), to remove the seed layer 38 and level the circuitboard.

The insulator 16 may include at least one of thermoplastic resin andglass epoxy resin, and when the bump pads 23, board pads 30, and circuitpatterns 26 are being transcribed into the insulator 16, the insulator16 may be in a softened state. That is, after softening the insulator 16by raising the temperature to the softening temperature of thethermoplastic and/or glass epoxy resin, burying in the softenedinsulator 16 the bump pads 23, board pads 30, and circuit patterns 26that are formed in relievo on the first and second carriers 42, 44, andthen separating or removing the first and second carriers 42, 44, thecircuit board may be manufactured, when the insulator 16 is cured, thathas the bump pads 23, board pads 30, and circuit patterns 26 in a buriedform.

Here, it is also possible to use prepreg for the insulator 16, in whichthermosetting resin is impregnated in glass fibers to provide asemi-cured state.

Afterwards, as illustrated in FIG. 14 and FIG. 15, vias 28 may be formedfor electrical interconnection between one and the other surfaces of theinsulator, and solder resist 34 may be coated for protecting the boardsurface and preventing solder bridges, to manufacture a circuit boardhaving buried bump pads 23, board pads 30, and circuit patterns 26.

FIG. 16 is a flowchart illustrating a method of manufacturing a circuitboard according to an embodiment of the invention. Referring to FIG. 16,in operation S100, solder pads may be formed on a surface of a firstcarrier. The process of forming the solder pads on the surface of thefirst carrier may be by selectively forming photoresist on a surface ofthe first carrier to form an intaglio pattern corresponding with thesolder pads, filling solder paste in the intaglio pattern, reflowing thesolder paste, and then removing the photoresist.

The method of selectively forming photoresist on a surface of the firstcarrier to form an intaglio pattern may include first applyingphotosensitive material on a surface of the first carrier using existingequipment, fabricating a photomask in correspondence with the solder padregion within the multiple bump pads on which the solder bumps are to bemounted, and afterwards stacking the photomask on the surface of thefirst carrier coated with photosensitive material and then exposing toultraviolet rays. After the exposure, when the non-cured portions of thephotosensitive material are developed with developing liquid, anintaglio pattern may be formed that is in correspondence with the solderpad forming region on the surface of the first carrier. The curedphotosensitive material that is not removed by the developing liquid maybecome the photoresist (S110).

When the intaglio pattern is formed on the first carrier, solder pastemay be filled in the intaglio pattern. For filling solder paste in theintaglio pattern, any method apparent to those skilled in the art may beused, such as filling in solder paste using a blade, and filling insolder paste ink using inkjet printing, etc. The solder paste filled inthe intaglio pattern may be made of the same material as that of thesolder bumps, and may include at least one of lead (Pb), gold (Au), andsilver (Ag) (S120).

When the solder paste is filled in, a reflow process may be performedfor curing the solder paste. Here, the solder paste may have a roundform at the upper surface, due to surface tension (S130). When thephotoresist is removed after the reflow process (S140), the solder padsmay be completed on the surface of the first carrier.

In operation S200, a metal film is formed which covers the solder padsand extends to the region corresponding to the bump pads.

The metal film may be formed by selectively forming photoresist on thefirst carrier, on which the solder pads are formed, to form an intagliopattern that is in correspondence with the bump pad forming region,forming the metal film in the intaglio pattern, and then removing thephotoresist.

The metal film may be formed such that covers the solder pads, betweenthe solder pad forming region and the bump pad forming region. To thisend, an intaglio pattern may be formed, which is greater than theintaglio pattern for forming the solder pads, on the surface of thefirst carrier where the solder pads are formed.

The photoresist may be formed on the surface of the first carrier toform an intaglio pattern corresponding to the bump pad forming region(S210). When the intaglio pattern is formed, the metal film may beformed for protecting the solder pads as well as for improving adhesionwith the circuit pattern that is to be formed later. In this embodiment,gold (Au) plating was performed to form the metal film. To perform thegold (Au) plating, a process of forming a seed layer on the surface ofthe first carrier may be performed before forming the solder pads, andgold (Au) electroplating may be performed using this seed layer as anelectrode.

By forming the metal film after forming the intaglio patterncorresponding to the bump pad forming region, the metal film may beformed which covers the already formed solder pads and which existsbetween the solder pad forming region and the bump pad forming region(S220).

Next, the photoresist used for forming the intaglio patterncorresponding to the bump pad forming region may be removed (S230).

In operation S300, a circuit pattern and a circuit layer electricallyconnected with the metal film may be formed on the surface of the firstcarrier. The circuit layer and circuit pattern may be formed byselectively forming photoresist on the surface of the first carrierwhere the solder pads and metal film are formed to form an intagliopattern corresponding to the circuit pattern and bump pad formingregion, filling the intaglio pattern with conductive material, and thenremoving the photoresist.

The circuit layer may be included in the circuit pattern. That is, thecircuit layer may be a part of the circuit pattern formed at the lowerportion of the bump pads, where the circuit pattern may enableelectrical connection between the chip, circuit board, and an externalcircuit board. Thus, by selectively forming photoresist on the surfaceof the first carrier to form an intaglio pattern corresponding to thecircuit pattern and bump pad forming region, the circuit layer andcircuit pattern may be formed at the same time (S310).

When the intaglio pattern corresponding to the circuit pattern and bumppad forming region is formed, a conductive material may be filled in theintaglio pattern. In this embodiment, copper (Cu) electroplating isperformed using a first carrier having a seed layer formed thereon, withthe seed layer as the electrode, to fill the conductive material ofcopper (Cu) in the intaglio pattern. If the first carrier is made of aninsulating resin, etc., it is also possible to fill the intaglio patternwith conductive material by first performing electroless plating to forma seed layer and then using this as the electrode to performelectroplating (S320). Later, when the conductive material is filled in,the photoresist may be removed (S330). By way of the proceduresdescribed above, a first carrier may be manufactured that has bump padsand a circuit pattern formed on its surface in relievo.

In operation S400, if the bump pads and circuit pattern are transcribedonly on one surface of the insulator, the first carrier and theinsulator are pressed such that one surface of the first carrier and theinsulator face each other.

The insulator may include at least one of thermoplastic resin and glassepoxy resin, and when the bump pads and circuit pattern are beingtranscribed into the insulator, the insulator may be in a softenedstate. That is, after softening the insulator by raising the temperatureto the softening temperature of thermoplastic and/or glass epoxy resin,the bump pads and circuit pattern that are formed in relievo on thefirst carrier may be buried in the softened insulator. It is alsopossible, however, to use prepreg as the insulator, in whichthermosetting resin is impregnated in glass fibers to provide asemi-cured state.

In operation S500, when the first carrier is separated or removed fromthe insulator and the insulator is cured, the bump pads and circuitpattern are transcribed into the insulator in a buried form.

In operation S600, one surface or both surfaces of the insulator areleveled. In the case that a carrier is used on which a seed layer isformed, the seed layer may be removed by etching one or both surfaces ofthe insulator or by chemical mechanical polishing (CMP), and the circuitboard may be leveled overall by polishing portions on one or bothsurfaces of the insulator by CMP.

Conversely, in the case of forming the bump pads and circuit pattern onone surface of the insulator and forming the board pads and circuitpattern on the other surface of the insulator with a single pressing,first, the first carrier may be prepared which has the bump pads andcircuit pattern formed on one surface in relievo, according to a methoddescribed above.

Next, the board pads may be formed, by selectively forming photoresiston a surface of a second carrier to form an intaglio patterncorresponding to a board pad forming region, filling the intagliopattern with a conductive material including at least one of nickel(Ni), gold (Au), aluminum (Al), and copper (Cu), and removing thephotoresist. When the board pads are formed, photoresist may beselectively formed on the surface of the second carrier that is incorrespondence with the circuit pattern to be formed on the othersurface of the insulator, the intaglio pattern may be filled in withconductive material, and then the photoresist may be removed, to preparethe second carrier that has the board pads and circuit pattern formed onits surface in relievo.

Next, the surface of the first carrier on which the bump pads andcircuit pattern are formed, and the surface of the second carrier onwhich the board pads and circuit pattern are formed, may be made to faceeither surface of the insulator. After the first carrier, insulator, andsecond carrier are pressed together, the first carrier and secondcarrier may be removed, whereby the bump pads, board pads, and circuitpatterns may be buried and transcribed into the insulator. In the casethat a carrier was used on which a seed layer is formed, a levelingoperation may be performed, such as by etching one or both surfaces ofthe insulator or by chemical mechanical polishing (CMP), to remove theseed layer and level the circuit board.

Afterwards, vias may be formed for electrical interconnection betweenone surface and the other surface of the insulator, and solder resistmay be applied for protecting the board surface and preventing solderbridges, to manufacture a circuit board having buried bump pads, boardpads, and circuit patterns.

According to certain aspects of the invention as set forth above, theamount of solder for the contacting of a flip chip can be adjusted, andsolder can be filled inside the board, so that after installing a chip,the overall thickness of the package can be reduced. Furthermore, byforming flat bump pads, the lead time for the coining operation may alsobe reduced.

In addition, a circuit board can be manufactured that has circuits ofhigh density. In a circuit board thus manufactured, the circuits can beformed inside the board, so that the adhesion between the circuits andthe board can be increased, leading to less peeling of the circuits, andthe overall thickness of the board can be reduced.

Also, as the circuits can be formed inside the board, there can begreater evenness and easier heat release. Moreover, there is lesslikelihood of bending of the circuit board, and higher reliability withrespect to ion migration between adjacent circuits.

While the spirit of the invention has been described in detail withreference to particular embodiments, the embodiments are forillustrative purposes only and do not limit the invention. It is to beappreciated that those skilled in the art can change or modify theembodiments without departing from the scope and spirit of theinvention.

1. A circuit board comprising: an insulator comprising a groove; acircuit layer filling a portion of the groove; a solder pad on thecircuit layer filling the remainder of the groove; and a circuit patternelectrically connected with the circuit layer, the circuit patternburied in the insulator such that a portion of the circuit pattern isexposed at a surface of the insulator.
 2. The circuit board of claim 1,wherein the circuit pattern is buried in either surface of theinsulator.
 3. The circuit board of claim 1, further comprising a metalfilm interposed between the circuit layer and the solder pad.
 4. Thecircuit board of claim 3, wherein the circuit layer is formed at abottom of the groove and at a side wall of the groove in extension fromthe bottom, and the metal film covers the circuit layer.
 5. The circuitboard of claim 1, wherein the solder pad contains at least one of lead(Pb), gold (Au), and silver (Ag).
 6. The circuit board of claim 3,wherein the metal film contains at least one of gold (Au) and nickel(Ni).